include ../Makefile

NAME 		= rsicv64-npc
TOPNAME 	= ysyx_22050369_cpu
OBJ_DIR 	= ./build
VERILATOR 	= verilator
#######################
#####   各种trance开关，0是关，1是开
#####   TRACE是波形开关
#######################
TRACE 	 ?= 
ITRACE 	 ?= 
FTRACE 	 ?= 
DIFFTEST ?= 
MTRACE   ?= 
VGA 	 ?= 1
KEY	     ?= 1
PROF     ?= 
#######################
#######################

#######################
#####    编译文件
#######################
CFILE 	= $(shell find $(abspath ./csrc) -name "*.cpp")
BFILE 	= $(shell find $(abspath ./vsrc/BASE) -name "*.v")
VFILE 	= $(shell find $(abspath ./vsrc/CPU) -name "*.v")	
TOPFILE = ./vsrc/ysyx_22050369_cpu.v
#######################
#######################


#######################
#####    各种trace打开时需要读取的文件
#######################
IMG	?= /home/jimmy/ysyx/am-kernels/tests/cpu-tests/build/bubble-sort-riscv64-npc.bin
ELF ?=/home/jimmy/ysyx/am-kernels/tests/cpu-tests/build/bubble-sort-riscv64-npc.elf
DIFF?=$(NEMU_HOME)/build/riscv64-nemu-interpreter-so
COMPILE_HOME ?= $(NPC_HOME)/build/
#######################
#######################

#######################
#####    基本编译需要的命令
#######################
VTOPNAME   = V$(TOPNAME)
LDFLAGS   += -lSDL2 -lSDL2_image -lreadline
COM_FLAGS  = --cc --exe --build \
			--x-assign fast --x-initial fast --noassert \
			-Wno-fatal --timescale 1ns/1ps -Wno-PINMISSING \
			-O3
SIM_FLAG   = --img=$(IMG) -b  
BIN		   = $(OBJ_DIR)/V$(TOPNAME)
VERCFLAGS  =
#######################
#######################
$(shell mkdir -p $(OBJ_DIR))

ifdef PROF 
COM_FLAGS   += --prof-cfuncs 
endif
ifdef ITRACE
CXXFLAGS 	+= $(shell llvm-config --cxxflags) -fPIE
LIBS 		+= $(shell llvm-config --libs)
VERCFLAGS 	+= -DITRACE  $(CXXFLAGS)
LDFLAGS 	+= $(LIBS) 
SIM_FLAG    += --log=npc-log.txt   
endif

ifdef TRACE 
COM_FLAGS   += --trace 
VERCFLAGS 	+= -DTRACE
endif

ifdef FTRACE 
VERCFLAGS   += -DFTRACE 
SIM_FLAG  	+= --elf=$(ELF)
endif

ifdef DIFFTEST 
VERCFLAGS   += -DDIFFTEST 
SIM_FLAG  	+= --diff=$(DIFF)
endif

ifdef MTRACE 
VERCFLAGS   += -DMTRACE 

endif


ifdef VGA 
VERCFLAGS   += -DVGA 
endif

ifdef KEY 
VERCFLAGS   += -DKEYBOARD
endif


all:com sim wave
	@echo "Write this Makefile by your self."

com:
	$(VERILATOR) $(addprefix -CFLAGS , $(VERCFLAGS)) $(addprefix -LDFLAGS , $(LDFLAGS)) \
	  --Mdir $(OBJ_DIR) \
	  $(COM_FLAGS) \
	  $(BFILE)  $(VFILE) $(TOPFILE) $(CFILE)   --top-module $(TOPNAME)  
build: com
	make -j8 VM_PARALLEL_BUILDS=1 OPT_FAST="-O3" -C $(COMPILE_HOME) -f $(VTOPNAME).mk 
sim:build
	$(call git_commit, "sim RTL") # DO NOT REMOVE THIS LINE!!!
	$(BIN)  $(SIM_FLAG)

wave:
	gtkwave wave.vcd
prof:
	gprof $(OBJ_DIR)/$(VTOPNAME) gmon.out > gpr.out
	verilator_profcfunc gpr.out >res.out
proj:
	cat $(BFILE) $(VFILE) $(TOPFILE) > ysyx_050369.v
csim:clean sim
clean:
	rm -rf $(OBJ_DIR)  wave.vcd *.out

